SAM chip vectors.$FFC0-$FFDF (65472-65503)
The sam is accessed through the address bus hence data on the data bus is
irrelevent at that time.To set a SAM register write to the ODD address given
and to clear a SAM address write to the EVEN address given.
Dec Hex Description
65472-65477 FFC0-FFC5 VDG mode (SAM)
GRAPHIC MODE>: DMA G6R/C G3R G3C G2R G2C G1C/R AI,AE,S4,S6
65472:65473 FFC0:FFC1 1 0 1 0 1 0 1 0
65474:65475 FFC2:FFC3 1 1 0 0 1 1 0 0
65476:65477 FFC4:FFC5 1 1 1 1 0 0 0 0
65478-65491 FFC6-FFD3 Offset of base VDG screen(ie.text)
Address of base screen=0000+(offset*512)
65478:65479 FFC6:FFC7 BIT0
65480:65481 FFC8:FFC9 BIT1
65482:65483 FFCA:FFCB BIT2
65484:65485 FFCC:FFCD BIT3
65486:65487 FFCE:FFCF BIT4
65488:65489 FFD0:FFD1 BIT5
65490:65491 FFD2:FFD3 BIT6
65492:65493 FFD4:FFD5 Page select:MPU addresses one of two 32K chunks
(Ignored on D32)
65494-65497 FFD6-FFD9 MPU rate
FAST FAST ADDR. DEP(ROM FAST) SLOW
65494:65495 FFD6:FFD7 1 0 1 0
65496:65497 FFD8:FFD9 1 1 0 0
65498-65501 FFDA-FFDD Memory size
64K STATIC 64K 1 or 2*16K 1 or 2*4K
65498:65499 FFDA:FFDB 1 0 1 0
65500:65501 FFDC:FFDD 1 1 0 0
65502:65503 FFDE:FFDF Map type-0:Upper 32K ROM
1:Upper 32K RAM
MPU Vectors $FFE0-$FFFF (65504-65535)
65504-65521 FFE0-FFF1 Reserved for future MPU enhancements
65522:65523 FFF2:FFF3 SWI3 vector
65524:65525 FFF4:FFF5 SWI2 vector
65526:65527 FFF6:FFF7 FIRQ vector
65528:65529 FFF8:FFF9 IRQ vector
65530:65531 FFFA:FFFB SWI vector
65532:65533 FFFC:FFFD NMI vector
65534:65535 FFFE:FFFF RESET vector
The SAM maps ROM at $BFF2-$BFFF over these vectors:
RESET vectored straight to ROM at $B3B4
Rest go via jump table in Page 1 of RAM (see map)